AMD
Fig u re 6 -1
Tra n s m it t e r a n d Re c e ive r De c o u p lin g La yo u t s
VCC Plane
VCC Plane
A
B
D
C2
C2
Transmitter
Receiver
Am7968
Am7969
VCC1
(TTL)
6
C3
7
C1
C1
VCC1
(TTL)
Leads must
be very short
(less than 1/4″)
C1
20
C3
VCC2
(ECL)
GND1
5
GND1
C3
22
VCC3
(CML)
GND2
(CML)
VCC2
(CML)
GND2
8
7
C3
C1
C3
C1
21
21
C1 = 0.1 µF (ceramic)
C2 = 1 µF Tantalum
C3 = 0.01 µF (ceramic)
12330E-19
To further decouple the TAXIchip set, it is highly recommended that ferrite beads be inserted
at locations A, B and D.
Fig u re 6 -3
J o g s a n d Glit c h e s in t h e Clo c k Lin e
Normal Overshoot < 0.5 V
CLK or X1
Jog or Glitch
12330E-20
Normal Undershoot < 0.5 V
3. Keep all bypass capacitors as close to the power pins of the device as possible. Lead
lengths should be minimized.
4. Use high quality RF grade capacitors such as type COG or X7R. Use of Z5U capaci-
tors is not recommended.
5. Ensure that the power supply does not have more that 100 mV of peak-to-peak noise
at any of the TAXI Vcc pins. Make this check while the TAXls are sending random
data.
6. While CLK can drive four X1 inputs or several TTL loads, the highest performance
can be achieved by reducing the load on the CLK pin. Care should be taken to en-
sure that no jogs or glitches occur in the CLK signal as shown in Figure 6-3. If pre-
sent, these glitches will be passed onto the PLL and cause an occasional error.
S e ria l Lin e s
7. Run serial outputs parallel to each other, or one on top of the other at all times and
route them away from the Transmitter. Do the same for serial inputs on the Receiver.
Running these serial traces adjacently will minimize noise caused by these extremely
fast signals on other traces. Use of strip lines for serial signals is recommended.
72
TAXIchip Integrated Circuits Technical Manual