Revision 5.01 – November 30, 2005
S5335 – PCI Bus Controller, 3.3V
Data Sheet
Table 40. Read Response (I/O Assigned) to an All-Ones write Operation to a Base Address Register
Response
00000000h
Size in bytes
none - disabled
[EPROM boot value]
00000000h or BIOS missing1
FFFFFFFDh
FFFFFFF9h
FFFFFFF1h
FFFFFFE1h
FFFFFFC1h
FFFFFF81h
FFFFFF01h
4 bytes (1 DWORDs)
8 bytes (2 DWORDs)
16 bytes (4 DWORDs)
32 bytes (8 DWORDs)
64 bytes (16 DWORDs)
128 bytes (32 DWORDs)
256 bytes (64 DWORDs)
FFFFFFFDh
FFFFFFF9h
FFFFFFF1h
FFFFFFE1h
FFFFFFC1h2
FFFFFF81h
FFFFFF01h
1. BADR5 register is not implemented and will return all 0’s.
2. Base Address Register 0 (at offset) 10h powers up as FFFFFFC1h. This default assignment allows usage without an external boot memory.
Should an EPROM or nvRAM be used, the base address can be boot loaded to become a memory space (FFFFFFC0h or FFFFFFC2h).
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