SONET/SDH OC-12 TO OC-48 MUX/DEMUX
S3045
Table 6. Common Pin Assignment and Descriptions (continued)
Pin Name
DLEB
Level
I/O
Pin #
Description
LVTTL
I
196
Diagnostic Loopback Enable. Active low. When DLEB is inactive,
the S3045 uses the primary data 311DATIN[7:0] and clock
311CLKIN inputs. When active, the S3045 selects diagnostic
loopback mode. In loopback mode the STS-48/STM-16
transmitter outputs (311DATOUT[7:0] and 311CLKOUT) are
internally connected to the STS-48/STM-16 receiver inputs
(311DATIN[7:0] and 311CLKIN). This signal is static and must not
be changed in normal operation.
VDD
202, 194, Power Pins. VDD pins must be tied to 3.3V. Note that it is
159, 143, recommended that VDD be powered on after VDD5.
123, 116,
109, 97,
82, 66,
58, 56,
55, 50,
28, 22, 12
VSS
195, 188, Ground Pins. VSS pins must be tied to ground.
170, 160,
147, 142,
132, 124,
108, 98,
90, 81,
71, 67,
63, 62,
61, 60,
59, 57,
49, 40,
29, 23,
13, 3
VDD5
171, 131, TTL I/O Power Pins. There are three power pins that may be
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connected to 3.3 volts or 5 volts. When these pins are connected
to 3.3 volts, the TTL interface is a 3.3 volt LVTTL interface. When
these pins are connected to 5 volts, the TTL inputs are 5 volt TTL
tolerant. The TTL outputs are the same regardless of which
voltage is tied to VDD5. All three pins must be connected to the
same voltage level. Note that it is recommended that VDD5 be
powered on before VDD.
TEST_EN[0:1]
TEST1
LVTTL
LVTTL
LVTTL
64, 65
187
TEST Enable. For factory test. For normal operation tie low.
TEST Pins. For factory test. Must leave unconnected.
TEST Pins. For factory test. Must leave unconnected.
TEST2
189
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December 13, 1999 / Revision E