SONET/SDH/ATM OC-12 TRANSMITTER AND RECEIVER
Serial to Parallel Converter
The Serial to Parallel Converter consists of three 8-bit
registers. The first is a serial-in, parallel-out shift reg-
ister, which performs serial to parallel conversion
clocked by the clock recovery block. The second is
an 8-bit internal holding register, which transfers data
from the serial to parallel register on byte boundaries
as determined by the frame and byte boundary de-
tection block. On the falling edge of the free running
POCLK, the data in the holding register is transferred
to an output holding register which drives POUT[7:0].
The delay through the Serial to Parallel converter can
vary from 1.5 to 2.5 byte periods (12 to 20 serial bit
periods) measured from the first bit of an incoming byte
to the beginning of the parallel output of that byte.
The variation in the delay is dependent on the align-
ment of the internal parallel load timing, which is
synchronized to the data byte boundaries, with respect
to the falling edge of POCLK, which is independent of
the byte boundaries. The advantage of this serial to
parallel converter is that POCLK is neither truncated
nor extended during reframe sequences.
S3017/S3018
OTHER OPERATING MODES
Diagnostic Loopback
The Diagnostic Loopback consists of alternate serial
data outputs (in the case of the S3017) and inputs (in the
case of the S3018).
On the S3017, the differential PECL output LPDATO
provides Diagnostic Loopback serial data. When the
Local Loopback Enable (LOCLPEN) input and
TSCLKSEL are low, this data output is a replica of
SERDATO. When LPDATO is connected to the S3018, a
loopback from the transmitter to the receiver at the serial
data rate can be set up for diagnostic purposes. When
LOCLPEN is high and TSCLKSEL is low, LPDATO is
held in the inactive state, with the positive output high
and the negative output low. In the inactive state, there will
be no interference from the transmitter to the receiver.
On the receiver side, the differential PECL input LPDATI
is the Diagnostic Loopback serial data input. When the
Local Loopback Enable (LOCLPEN) input is set low, the
LPDATI input is routed in place of the normal data
stream (SERDATI).
Figure 7. Loopback Diagram
Data In
Control
S2030
Fiber
S3017
Channel
Transmitter
S2031
Fiber
S3018
Channel
Receiver
Data Out
CLK
Link
Loopback
Local
Diagnostic
Loopback
Loopback
Local
Diagnostic
Loopback
Loopback
Data Out
CLK
S2031
Fiber
Channel
S3018
Receiver
S2030
Fiber
Channel
S3017
Transmitter
Link
Loopback
Data In
Control
December 10, 1999 / Revision B
7
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
