S2046/S2047
GIGABIT ETHERNET CHIPSET
Table 15. S2046 Transmitter Timing
Parameters
Description
Min
Max
Units
Conditions
T
1
Data setup w.r.t. REFCLK
2
—
ns
See note.
—
T
2
Data hold w.r.t. REFCLK
1.5
—
ns
Note: All AC measurements are made from the reference voltage level of the clock (1.4 V) to the valid input or output data levels
(0.8 V or 2.0 V).
Table 16. S2047 Receiver Timing
Parameters
Description
Min
Max
Units
Conditions
1
ns
T
3
RCLK to RCLKN skew
—
Tested on a sample basis.
ns
ns
T
4
Data setup w.r.t. RCLK, RCLKN
Data hold w.r.t. RCLK, RCLKN
3.0
1.5
1.0625 GHz Mode
1.0625 GHz Mode
T
5
Max. Load = 15 pF.
May 16, 2000 / Revision NC
21
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
