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S2047B-5 参数 Datasheet PDF下载

S2047B-5图片预览
型号: S2047B-5
PDF下载: 下载PDF文件 查看货源
内容描述: [Interface Circuit, PQFP52, 10 X 10 MM, COMPACT, PLASTIC, QFP-52]
分类和应用: 电信电信集成电路
文件页数/大小: 23 页 / 165 K
品牌: AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
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S2046/S2047  
GIGABIT ETHERNET CHIPSET  
ments of REFCLK with respect to the TX[10:19]  
(TX[0:9]) signals, minimum high and low durations,  
and the rising and falling slew rate magnitudes. In  
addition, this system supplied clock must not have  
more jitter than ±20% of a baud interval.  
Timing  
The data on the TX[00:09] (TX[00:19]) data bus will  
be sampled on every rising edge of REFCLK. The  
data will be serialized and transmitted onto the serial  
link. The figure below illustrates the timing require-  
Figure 9. REFCLK Timing Diagram  
May 16, 2000 / Revision NC  
16  
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