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S2004TBAB 参数 Datasheet PDF下载

S2004TBAB图片预览
型号: S2004TBAB
PDF下载: 下载PDF文件 查看货源
内容描述: [Telecom IC, Bipolar, PBGA208]
分类和应用:
文件页数/大小: 42 页 / 811 K
品牌: AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
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Revision J – April 7, 2006  
S2004 – Quad Serial Backplane Device  
Data Sheet  
The SAMPLE/PRELOAD instruction allows a snapshot  
of the normal operation of the component to be taken  
and examined. It also allows data values to be loaded  
onto the latched parallel outputs of the boundary-scan  
shift register prior to selection of the other boundary-  
scan test instructions.  
Table 10. JTAG Pin Assignments (Continued)  
Routing  
Out  
S2004 Pin  
Name  
Core_Scan  
Port Name  
JTAG  
Mode  
In  
DIND1  
tdatain_d (1)  
tdatain_d (0)  
tclkd  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
35  
36  
37  
38  
39  
40  
41  
42  
43  
44  
45  
46  
47  
48  
49  
50  
51  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
The following provides a list of the pins that are JTAG  
tested. Each port has a boundary scan register (BSR),  
unless otherwise noted. The following features are  
described: the JTAG mode of each register (input,  
output2, or internal (refers to an internal package pin)),  
the direction of the port if it has a boundary scan regis-  
ter (in or out), and the position of this register on the  
scan chain.  
DIND0  
TCLKD  
DNC  
dnc  
KGENC  
DINC7  
DINC6  
DINC5  
DINC4  
DINC3  
DINC2  
DINC1  
DINC0  
TCLKC  
KGENB  
DNB  
kgenc  
tdatain_c (7)  
tdatain_c (6)  
tdatain_c (5)  
tdatain_c (4)  
tdatain_c (3)  
tdatain_c (2)  
tdatain_c (1)  
tdatain_c (0)  
tclkc  
Table 10. JTAG Pin Assignments  
Routing  
S2004 Pin  
Name  
Core_Scan  
Port Name  
JTAG  
Mode  
Out  
0
In  
-
SYNC  
sync  
Input  
Input  
CMODE  
CH_LOCK  
LPEND  
LPENC  
LPENB  
cmode  
chan_lock  
lpend  
1
-
Input  
2
-
Input  
3
-
lpenc  
Input  
4
-
kgenb  
lpenb  
Input  
5
-
dnb  
LPENA  
lpena  
Input  
6
-
DINB7  
DINB6  
DINB5  
DINB4  
DINB3  
DINB2  
DINB1  
DINB0  
TCLKB  
DNA  
tdatain_b (7)  
tdatain_b (6)  
tdatain_b (5)  
tdatain_b (4)  
tdatain_b (3)  
tdatain_b (2)  
tdatain_b (1)  
tdatain_b (0)  
tclkb  
CLKSEL  
TMODE  
clksel  
Input  
7
-
tmode  
Input  
8
-
Internal  
Input  
9
-
RESET  
REFCLK  
TCLKO  
reset  
refclk  
10  
11  
-
-
Input  
-
transmit_clk_  
buf_out  
Output2  
12  
DND  
dnd  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
13  
14  
15  
16  
17  
18  
19  
20  
-
-
-
-
-
-
-
-
KGEND  
DIND7  
DIND6  
DIND5  
DIND4  
DIND3  
DIND2  
kgend  
dna  
tdatain_d (7)  
tdatain_d (6)  
tdatain_d (5)  
tdatain_d (4)  
tdatain_d (3)  
tdatain_d (2)  
KGENA  
DINA7  
DINA6  
DINA5  
DINA4  
kgena  
tdatain_a (7)  
tdatain_a (6)  
tdatain_a (5)  
tdatain_a (4)  
AMCC Confidential and Proprietary  
21