QT2022/32 - Data Sheet: DS3051
8.2.7 Transmit Polarity Control Pin (TXOUT_SEL)
TXOUT_SEL controls the 10Gb/s transmit data output polarity as defined at the QT2022/32 pins/balls. The default
setting, TXOUT_SEL=0, is compatible with XENPAK module requirements.
Table 16: TXOUT Polarity
Signal
TXOUT_SEL=0
TXOUT_SEL=1
TXOUTP
TXOUTN
TXOUTN
TXOUTP
8.2.8 Low Power Mode Control Pin (TXON)
TXON is the low power mode control pin. When TXON=1 the QT2022/32 will be in normal operating mode. When
TXON=0, only the MDIO, EEPROM and DOM functions will be active. An external reference clock must be applied
at EREFCLKP/N for these functions to be active.
8.2.9 XAUI Input Lane Ordering Control Pin (TxXAUI_SEL)
TxXAUI_SEL controls the transmit path XAUI lane ordering as defined at the QT2022/32 pins/balls. The default
setting, TxXAUI_SEL=0, is compatible with XENPAK module requirements
When the QT2022/32 is in scan mode, the TxXAUI_SEL pin functions as a scan enable pin. If the input is high,
scans are enabled.
Table 17: TxXAUI Lane Ordering
Signal
TxXAUI_SEL=0
TxXAUI_SEL=1
TxXAUI3P
TxXAUI3N
TxXAUI2P
TxXAUI2N
TxXAUI1P
TxXAUI1N
TxXAUI0P
TxXAUI0N
TxXAUI0P
TxXAUI0N
TxXAUI1P
TxXAUI1N
TxXAUI2P
TxXAUI2N
TxXAUI3P
TxXAUI3N
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