QT2022/32 - Data Sheet: DS3051
18.7 Improving MDIO Bus Integrity
In many systems, there can be significant ringing and crosstalk on the MDIO and MDC signals. The ringing is
caused by potentially large capacitance and self-inductance of the signal lines. Very fast transitions can stimulate
LC ringing and result in crosstalk between the two signal lines, since they are often routed in close proximity.
To minimize or eliminate ringing, place a small-valued series resistor directly on the MDIO and MDC nets. The
resistor introduces a real loss into the circuit, which effectively damps out the ringing. The resistor value, R, should
be less than ~10% the value of the pullup resistor, Rpu, to prevent significant ground offset of Vil. For module appli-
cations, series resistors should be placed in the module as well as on the hostboard. The resistor on the hostboard
should be placed near the middle of the bus.
To avoid crosstalk, the MDIO and MDC signals should be separated sufficiently on the layout. Placement of a
ground plane or power plane between the traces will help eliminate crosstalk.
Include component footprints for pullups to VCC on MDIO and MDC inside the module. This will provide the flexibil-
ity to modify the bus termination as required. Modifications to the termination may be required to ensure bus
integrity on different host cards.
Figure 61: MDIO Bus Implementation
VCC
VCC
Rpu
R
R
MDIO
MDC
R
R
Station Manager
(STA)
QT2032/QT2022
(MMD)
e.g. MAC
Edge Connector
(module application only)
214
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