QT2022/32 - Data Sheet: DS3051
6.2.3.1 Rule a, Method 2.
Table 74: VCXO PLL Interface Parameters
Parameter
Description
Min
Typ
400
Max
Units
Notes
PFD Gain
mV/2π
rad
PFD Differential Output Swing
VCXO characteristics
+-400
mVpp
Please see VCXOI input specifications
in Table 66 on page 191
PFD differential Rout
2
kΩ
Table 75: Round-trip Delay Constraints
Parameter
Description
Min Typ Max Units
Notes
XGXS & XAUI
XGXS & XAUI sublayer round-trip
time
400
ns
Includes 20” of FR4 in each direction
(~7ns)
10GBASE-R PCS
WIS
PCS sublayer round-trip time
WIS sublayer round-trip time
160
ns
ns
2500
Default round-trip delay. Does not meet
IEEE 802.3 specification.
1350
40
Requires modification of default register
values. See Section 18.9 on page 216 for
details.
Meets IEEE delay requirement.
Serial PMA & PMD
Serial PMA & PMD sublayer round-
trip time
ns
Excludes optical fiber patch cord.
202
AppliedMicro - Confidential & Proprietary
Revision 5.11
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
