Revision 1.23 - Sept 21, 2006
PowerPC 440SPe Embedded Processor
Preliminary Data Sheet
Table 14. I/O Specifications—All Speeds (Sheet 1 of 2)
Notes:
1. Ethernet interface meets timing requirements as defined by IEEE 802.3 standard.
2. PCI-X timings are for asynchronous operation up to 133.33MHz. PCI-X input setup time requirement is 1.2ns for 133.33MHz
and 1.7ns for 66.66MHz. PCI timings (in parentheses) are for asynchronous operation up to 66.66MHz. PCI output hold time
requirement is 1ns for 66.66MHz and 2ns for 33.33MHz.
3. These are DDR signals that can change on both the positive and negative clock transitions.
Input (ns)
Output (ns)
Hold Time
(T max) (T min)
OV
Output Current (mA)
I/O H I/O L
(minimum) (minimum)
Signal
Clock
Notes
Setup Time Hold Time Valid Delay
(T min)
(T min)
IS
IH
OH
PCI-X Interface
PCIX0Ack64
PCIX0AD63:00
PCIX0BE7:0
PCIX0CalG0:1
PCIX0CalR0:1
PCIX0Cap
Note 2 (2)
Note 2 (2)
Note 2 (2)
Note 2 (2)
dc
0.5(0)
0.5(0)
0.5(0)
0.5(0)
dc
3.5(6)
3.5(6)
3.5(6)
n/a
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
n/a
0.5
0.5
0.5
n/a
n/a
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
n/a
0.5
0.5
0.5
n/a
n/a
n/a
n/a
0.5
0.5
0.5
0.5
0.5
0.5
1.5
1.5
1.5
n/a
n/a
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
n/a
1.5
1.5
1.5
n/a
n/a
n/a
n/a
1.5
1.5
1.5
1.5
1.5
1.5
PCIX0Clk
PCIX0Clk
PCIX0Clk
PCIX0Clk
2
2
2
2
n/a
n/a
async
2
Note 2 (2)
Note 2 (2)
Note 2 (2)
n/a
0.5(0)
0.5(0)
0.5(0)
n/a
3.5(6)
3.5(6)
3.5(6)
3.5(6)
3.5(6)
3.5(6)
3.5(6)
3.5(6)
3.5(6)
n/a
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
n/a
PCIX0Clk
PCIX0Clk
PCIX0Clk
PCIX0Clk
PCIX0Clk
PCIX0Clk
PCIX0Clk
PCIX0Clk
PCIX0Clk
PCIX0Clk
PCIX0Clk
PCIX0Clk
PCIX0Clk
PCIX0Clk
PCIX0Clk
PCIX0Clk
PCIX0Clk
PCIX0Clk
PCIX0Clk
PCIX0Clk
PCIX0Clk
PCIX0Clk
PCIX0Clk
PCIX0Clk
2
PCIX0DevSel
PCIX0ECC5:2
PCIX0Frame
PCIX0Gnt0
PCIX0Gnt1
PCIX0Gnt2:3
PCIX0IDSel
PCIX0INTA
PCIX0IRDY
PCIX0M66En
PCIXPar
2
2
n/a
n/a
2
n/a
n/a
2
Note 2 (2)
Note 2 (2)
Note 2 (2)
Note 2 (2)
Note 2 (2)
Note 2 (2)
Note 2 (2)
Note 2 (2)
Note 2 (2)
Note 2 (2)
n/a
0.5(0)
0.5(0)
0.5(0)
0.5(0)
0.5(0)
0.5(0)
0.5(0)
0.5(0)
0.5(0)
0.5(0)
n/a
2
2
2
2
3.5(6)
3.5(6)
3.5(6)
n/a
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
n/a
2
2
2
PCIXPar64
PCIX0PErr
2
n/a
n/a
2
PCIX0Req0
PCIX0Req1:3
PCIX0Req64
PCIX0Reset
PCIX0SErr
n/a
n/a
2
n/a
n/a
2
Note 2 (2)
Note 2 (2)
Note 2 (2)
Note 2 (2)
Note 2 (2)
Note 2 (2)
0.5(0)
0.5(0)
0.5(0)
0.5(0)
0.5(0)
0.5(0)
3.5(6)
3.5(6)
3.5(6)
3.5(6)
3.5(6)
3.5(6)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
2
2
2
PCIX0Stop
PCIX0TRDY
PCIX0VC
2
2
2
Ethernet Interface
EMCCD
-
-
-
-
na
na
na
-
na
na
na
-
19.1
19.1
19.1
19.1
19.1
19.1
19.1
19.1
19.1
19.1
19.1
19.1
8.7
8.7
8.7
8.7
8.7
8.7
8.7
8.7
8.7
8.7
8.7
8.7
1, async
1, async
1, async
EMCCrS
EMCMDClk
EMCMDIO
na
-
na
-
EMCMDClk
EMCRxClk
EMCRxClk
EMCRxClk
EMCRxD0:7
EMCRxDV
4
1
na
na
na
na
na
na
na
15
na
na
na
na
na
na
na
2
4
1
EMCRxErr
-
-
EMCRxClk
-
-
1, async
EMCRefClk
EMCTxClk
-
-
na
na
na
na
na
na
1, async
1, async
EMCGTxClk
EMCTxD0:7
EMCTxClk
AMCC Proprietary
67
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
