Revision 1.26 – October 15, 2007
440EPx – PPC440EPx Embedded Processor
Preliminary Data Sheet
Table 20. I/O Specifications—All Speeds (Sheet 1 of 3)
Notes:
1. Ethernet interface meets timing requirements as defined by IEEE 802.3 standard.
Input (ns)
Output (ns)
Output Current (mA)
Signal
Clock
Notes
async
async
async
Setup Time Hold Time
Valid Delay
(TOV max)
Hold Time
(TOH min)
I/O H
(minimum)
I/O L
(minimum)
(TIS min)
(TIH min)
PCI Interface
PCIAD31:00
PCIC3:0/BE3:0
PCIClk
3
3
0
0
6
6
2
2
0.5
0.5
n/a
0.5
0.5
0.5
n/a
0.5
0.5
0.5
0.5
n/a
n/a
0.5
0.5
0.5
1.5
1.5
n/a
1.5
1.5
1.5
n/a
1.5
1.5
1.5
1.5
n/a
n/a
1.5
1.5
1.5
PCIClk
PCIClk
PCIDevSel
PCIFrame
PCIGnt0:5
PCIIDSel
5
5
0
0
6
6
2
2
PCIClk
PCIClk
PCIClk
PCIClk
n/a
5
n/a
0
6
2
n/a
n/a
6
n/a
n/a
2
PCIINT
n/a
5
n/a
0
PCIIRDY
PCIClk
PCIClk
PCIClk
PCIClk
PCIPar
5
0
6
2
PCIPErr
5
0
6
2
PCIReq0:5
PCIReset
5
0
n/a
n/a
6
n/a
n/a
2
n/a
5
n/a
0
PCISErr
PCIClk
PCIClk
PCIClk
PCIStop
5
0
6
2
PCITRDY
5
0
6
2
Ethernet MII Interface
GMCCD
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
5.1
5.1
5.1
5.1
n/a
5.1
5.1
5.1
5.1
n/a
5.1
5.1
6.8
6.8
6.8
6.8
n/a
6.8
6.8
6.8
6.8
n/a
6.8
6.8
async
async
GMCCrS
GMCMDClk
GMCMDIO
GMCRxClk
GMCRxD0:3
GMCTxD0:3
GMCRxDV
GMCRxEr
GMCTxClk
GMCTxEr
10
10
10
1.5
GMCMDClk
10
n/a
10
10
10
n/a
10
10
n/a
10
n/a
1
GMCRxClk
GMCTxClk
GMCRxClk
GMCRxClk
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
10
10
1
1
GMCTxClk
GMCTxClk
GMCTxEn
Ethernet GMII Interface
GMCCD
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
5.1
5.1
5.1
5.1
5.1
n/a
5.1
5.1
5.1
5.1
5.1
5.1
5.1
6.8
6.8
6.8
6.8
6.8
n/a
6.8
6.8
6.8
6.8
6.8
6.8
6.8
async
async
GMCCrS
GMCGTxClk
GMCMDClk
GMCMDIO
GMCRefClk
GMCRxClk
GMCRxD0:3
GMCTxD0:3
GMCRxDV
GMCRxEr
GMCTxEr
10
10
10
1.5
GMCMDClk
2
n/a
2
0
n/a
0
n/a
2.5
n/a
n/a
2.5
2.5
n/a
1
GMCRxClk
GMCGTxClk
GMCRxClk
GMCRxClk
GMCGTxClk
GMCGTxClk
n/a
n/a
1
2
0
n/a
n/a
n/a
n/a
GMCTxEn
1
AMCC Proprietary
81