Revision 1.26 – October 15, 2007
440EPx – PPC440EPx Embedded Processor
Preliminary Data Sheet
Table 20. I/O Specifications—All Speeds (Sheet 3 of 3)
Notes:
1. Ethernet interface meets timing requirements as defined by IEEE 802.3 standard.
Input (ns)
Output (ns)
Output Current (mA)
Signal
USB2Susp
Clock
Notes
Setup Time Hold Time
Valid Delay
(TOV max)
Hold Time
(TOH min)
I/O H
(minimum)
I/O L
(minimum)
(TIS min)
(TIH min)
n/a
n/a
4
n/a
n/a
0
4
4
1
1
19.1
19.1
n/a
8.7
8.7
n/a
8.7
8.7
USB2TermSel
USB2TxRdy
USB2TxVal
USB2XcvrSel
Interrupts Interface
IRQ0:9
n/a
4
n/a
1
n/a
n/a
n/a
n/a
19.1
19.1
4
1
n/a
n/a
n/a
n/a
n/a
n/a
JTAG Interface
TCK
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
async
async
async
async
async
TDI
TDO
TMS
TRST
System Interface
SysClk
n/a
n/a
n/a
n/a
5.1
n/a
n/a
n/a
19.1
5.1
14.6
5.1
n/a
n/a
n/a
n/a
6.8
n/a
n/a
n/a
8.7
6.8
6.6
6.8
TmrClk
async
async
async
async
async
SysReset
Halt
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
SysErr
TestEn
DrvrInh1:2
RcvrInh
GPIO00:11
GPIO12:25
GPIO26:48
GPIO49:63
Trace Interface
TrcClk
5.1
5.1
5.1
5.1
6.8
6.8
6.8
6.8
TrcBS0:2
TrcES0:4
TrcTS0:6
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
AMCC Proprietary
83
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
