Revision 1.19 – May 07, 2008
440GR – PPC440GR Embedded Processor
Preliminary Data Sheet
Revision Log
Date
Version
Contents of Modification
01/12/2005
01/27/2005
01/31/2005
Initial creation of document.
Restore second DMA controller and make PVR and JTAG ID same as 440EP.
Update DDR SDRAM timing.
Update I/O definitions.
Misc. corrections
03/03/2005
03/30/2005
04/18/2005
04/28/2005
05/09/2005
05/18/2005
06/06/2005
07/11/2005
07/20/2005
08/05/2005
09/21/2005
09/22/2005
10/06/2005
10/10/2005
Remove 400MHz and 466MHz part numbers.
Remove reference to USB end points.
Update DDR SDRAM timing.
Update reserved signals and add description of TmrClk2.
Correct specs regarding the frequency range allowed for TmrClk2.
Change description of TmrClk2.
1.08
1.09
Add RoHS compliance statement and change maximum NAND Flash to 256MB.
Misc. changes.
Change solder ball size specification.
Add power dissipation values for all supply voltages at the CPU speeds supported.
Transfer applicable data (input capacitance, thermal performance, etc.) from 400EP data sheet.
Misc. changes.
1.10
1.11
1.12
Add 400Mhz CPU speed back into available PN list.
Add default configuration X when bootstrap IIC read fails to Table 27.
Add package nomenclature.
11/18/2005
1.13
Correct MemClkOut duty cycle.
Correct description and move PerErr signal from master to slave.
Change maximum VCO frequency to 1334MHz.
02/16/2006
05/24/2006
07/19/2006
1.14
1.15
1.16
Add revision level B (1.1) part numbers and PVR numbers.
Update power dissipation and add additional temperature data.
Correct enable/disable specifications for PCI Gnt/Req signals.
86
AMCC Proprietary
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
