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PPC440EP-3JC533C 参数 Datasheet PDF下载

PPC440EP-3JC533C图片预览
型号: PPC440EP-3JC533C
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microprocessor, 32-Bit, 533MHz, CMOS, PBGA456, 35 X 35 MM, ROHS COMPLIANT, PLASTIC, BGA-456]
分类和应用: 时钟外围集成电路
文件页数/大小: 87 页 / 1210 K
品牌: AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
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Revision 1.29 – May 07, 2008  
440EP – PPC440EP Embedded Processor  
Data Sheet  
Table 19. I/O Specifications—PCI, USB, UART, IIC, SPI, Ethernet, System and Debug Interfaces (Sheet 1 of 3)  
Notes:  
1. Ethernet interface meets timing requirements as defined by IEEE 802.3 standard.  
2. EMCSync is a weak driver. Redrive EMCSync when driving more than one load.  
Input (ns)  
Output (ns)  
Output Current (mA)  
Signal  
Clock  
Notes  
Setup Time Hold Time  
Valid Delay  
(TOV max)  
Hold Time  
(TOH min)  
I/O H  
(minimum)  
I/O L  
(minimum)  
(TIS min)  
(TIH min)  
PCI Interface  
PCIAD31:00  
PCIC3:0/BE3:0  
PCIDevSel  
PCIFrame  
PCIGnt0:5  
PCIIDSel  
5
5
5
5
0
0
0
0
6
6
6
6
6
2
2
2
2
2
0.5  
0.5  
0.5  
0.5  
0.5  
n/a  
0.5  
0.5  
0.5  
0.5  
n/a  
n/a  
0.5  
0.5  
0.5  
1.5  
1.5  
1.5  
1.5  
1.5  
n/a  
1.5  
1.5  
1.5  
1.5  
n/a  
n/a  
1.5  
1.5  
1.5  
PCIClk  
PCIClk  
PCIClk  
PCIClk  
PCIClk  
PCIClk  
PCIClk  
PCIClk  
PCIClk  
PCIClk  
PCIClk  
PCIClk  
PCIClk  
PCIClk  
PCIClk  
5
0
PCIINT  
6
6
6
6
2
2
2
2
async  
PCIIRDY  
5
5
5
5
0
0
0
0
PCIPar  
PCIPErr  
PCIReq0:5  
PCIReset  
PCISErr  
5
5
5
0
0
0
6
6
6
2
2
2
PCIStop  
PCITRDY  
Ethernet MII Interface  
EMCCD  
10  
10  
10  
10  
10  
10  
5.1  
5.1  
5.1  
5.1  
5.1  
5.1  
5.1  
5.1  
n/a  
5.1  
5.1  
5.1  
6.8  
6.8  
6.8  
6.8  
6.8  
6.8  
6.8  
6.8  
n/a  
6.8  
6.8  
6.8  
1, async  
1, async  
EMCCrS  
EMCDV  
EMCMDClk  
EMCMDIO  
EMCRxClk  
EMCRxD0:3  
EMCRxErr  
EMCTxClk  
EMCTxD0:3  
EMCTxEn  
EMCTxErr  
1, async  
EMCMDClk  
1
1, async  
10  
10  
10  
10  
EMCRxClk  
EMCRxClk  
1
1
1, async  
20  
20  
20  
0
0
0
EMCTxClk  
EMCTxClk  
EMCTxClk  
1
1
1
for MII,  
RMII,  
SMII  
RejectPkt  
3
1
EMCRxClk  
Ethernet RMII Interface  
EMC0CRSDV  
EMC0RxD0:1  
EMC0RxErr  
4
4
4
2
2
2
5.1  
5.1  
5.1  
6.8  
6.8  
6.8  
EMCRefClk  
EMCRefClk  
EMCRefClk  
1
1
1
EMC0TxD0:1  
EMC1CRSDV  
EMC1RxD0:1  
EMC1RxErr  
12.5  
12.5  
0
0
4
4
4
2
2
2
5.1  
5.1  
5.1  
6.8  
6.8  
6.8  
EMCRefClk  
EMCRefClk  
EMCRefClk  
1
1
1
EMC1TxD0:1  
AMCC Proprietary  
71  
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