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PPC440EP-3JC533C 参数 Datasheet PDF下载

PPC440EP-3JC533C图片预览
型号: PPC440EP-3JC533C
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microprocessor, 32-Bit, 533MHz, CMOS, PBGA456, 35 X 35 MM, ROHS COMPLIANT, PLASTIC, BGA-456]
分类和应用: 时钟外围集成电路
文件页数/大小: 87 页 / 1210 K
品牌: AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
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Revision 1.29 – May 07, 2008  
440EP – PPC440EP Embedded Processor  
Data Sheet  
DMA to PLB4 Controller  
This DMA controller provides a DMA interface dedicated to the USB 2.0 device ports and the 128-bit PLB.  
Features include:  
• 4 independent channels supporting internal USB 2.0 Device endpoints 1 and 2  
• Support for memory-to-memory, peripheral-to-memory, and memory-to-peripheral transfers  
• Scatter/gather capability  
• 128-byte buffer with programmable thresholds  
Serial Ports (UART)  
Features include:  
• Up to four ports in the following combinations:  
– One 8-pin  
– Two 4-pin  
– One 4-pin and two 2-pin  
– Four 2-pin  
• Selectable internal or external serial clock to allow wide range of baud rates  
• Register compatibility with NS16550 register set  
• Complete status reporting capability  
• Fully programmable serial-interface characteristics  
• Supports DMA using internal DMA function on PLB 64  
IIC Bus Interface  
Features include:  
• Two IIC interfaces provided  
2
• Support for Philips® Semiconductors I C Specification, dated 1995  
• Operation at 100kHz or 400kHz  
• 8-bit data  
• 10- or 7-bit address  
• Slave transmitter and receiver  
• Master transmitter and receiver  
• Multiple bus masters  
• Two independent 4 x 1 byte data buffers  
• Twelve memory-mapped, fully programmable configuration registers  
• One programmable interrupt request signal  
• Provides full management of all IIC bus protocols  
• Programmable error recovery  
• Includes an integrated boot-strap controller (BSC) that is multiplexed with the IIC0 interface  
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AMCC Proprietary  
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