Revision 1.26 – April 25, 2007
440EP – PPC440EP Embedded Processor
Data Sheet
The heat sinks are manufactured by:
Alpha Novatech, Inc. (www.alphanovatech.com)
473 Sapena Court, #12
Santa Clara, CA 95054
Phone: 408-567-8082
Test Conditions
Output
Pin
Clock timing and switching characteristics are specified in accordance with operating
conditions shown in the table “Recommended DC Operating Conditions.” AC
50pF
specifications are characterized with V = 1.5V, T = +125°C and a 50pF test load as
DD
J
shown in the figure to the right.
Table 14. Clocking Specifications
Symbol
Parameter
Min
Max
Units
SysClk Input
FC
TC
Frequency
Period
33.33
66.66
30
MHz
ns
15
TCS
TCH
TCL
Edge stability (cycle-to-cycle jitter)
–
±0.15
ns
High time
Low time
40% of nominal period
40% of nominal period
60% of nominal period
60% of nominal period
ns
ns
Note: Input slew rate ≥ 1V/ns
MemClkOut and PLB Clock
FC
TC
Frequency
Period
100
7.5
133.33
10
MHz
ns
TCH
High time
45% of nominal period
55% of nominal period
ns
PLL VCO
FC
Frequency
Period
600
1334
1.66
MHz
ns
TC
0.7496
MAL Clock
FC
Frequency
Period
45
12
83.33
22.2
MHz
ns
TC
Figure 4. Timing Waveform
T
T
CL
CH
T
C
AMCC Proprietary
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