Revision 1.07 – September 10, 2007
PPC405EP – PowerPC 405EP Embedded Processor
Data Sheet
Table 14. I/O Specifications—Group 1 (Sheet 2 of 2)
Notes:
1. PCI timings are for asynchronous operation up to 66.66MHz. PCI output hold time requirement is 1ns for 66.66MHz and 2ns
for 33.33MHz.
2. Ethernet interface meets timing requirements as defined by IEEE 802.3 standard. Timing shown is with EMAC noise filter
selected. See the CPC0_EPCTL register PowerPC 405EP Embedded Processor User’s Manual.
3. For PCI, IOH is specified at 0.9OVDD and IOL is specified at 0.1OVDD. For all other interfaces, IOH is specified at 2.4V and IOL
is specified at 0.4V.
Input (ns)
Output (ns)
Output Current (mA)
Signal
Clock
Notes
Setup Time Hold Time
Valid Delay
(TOV max)
Hold Time
(TOH min)
IOH
(min)
IOL
(min)
(TIS min)
(TIH min)
Internal Peripheral Interface
IICSCL
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
15.3
15.3
na
10.2
10.2
na
IICSDA
UART0_CTS
UART0_RTS
UART0_Rx
UART0_Tx
UART1_Rx
UART1_Tx
Interrupts Interface
[IRQ0:6]
10.3
na
7.1
na
10.3
na
7.1
na
10.3
7.1
10.3
7.1
JTAG Interface
TCK
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
7.1
na
na
async
async
async
async
async
TDI
TDO
10.3
na
TMS
TRST
na
System Interface
GPIO00:31
Halt
na
na
na
na
na
3
na
na
na
na
na
1
na
na
na
na
na
na
na
na
na
na
na
na
na
na
10.3
na
7.1
na
async
async
async
async
async
SysErr
10.3
10.3
na
7.1
7.1
na
SysReset
TestEn
[RejectPkt0:1]
SysClk
na
na
na
na
na
na
46
AMCC
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
