Revision 1.02 – January 11, 2005
PPC405CR – PowerPC 405CR Embedded Processor
List of Figures
Data Sheet
Figure 1. PPC405CR Embedded Controller Functional Block Diagram .................................................................. 5
Figure 2. 27mm, 316-Ball E-PBGA Package ......................................................................................................... 10
Figure 3. Package Thermal Specifications ............................................................................................................ 28
Figure 4. 5V-Tolerant I/O Input Current ................................................................................................................. 30
Figure 5. Timing Waveform .................................................................................................................................... 32
Figure 6. Input Setup and Hold Waveform ............................................................................................................. 35
Figure 7. Output Delay and Float Timing Waveform .............................................................................................. 35
List of Tables
Table 1. System Memory Address Map 4GB System Memory ................................................................................ 6
Table 2. DCR Address Map 4KB Device Configuration Register ............................................................................. 6
Table 3. Signals Listed Alphabetically ................................................................................................................... 11
Table 4. Signals Listed by Ball Assignment ........................................................................................................... 18
Table 5. Pin Summary ........................................................................................................................................... 21
Table 6. Signal Functional Description .................................................................................................................. 23
Table 7. Absolute Maximum Ratings ..................................................................................................................... 28
Table 8. Recommended DC Operating Conditions ................................................................................................ 29
Table 9. Input Capacitance .................................................................................................................................... 30
Table 10. Clocking Specifications .......................................................................................................................... 32
Table 11. Peripheral Interface Clock Timings ........................................................................................................ 34
Table 12. I/O Specifications—All speeds ............................................................................................................... 36
Table 13. I/O Specifications—133 and 200MHz .................................................................................................... 37
Table 14. I/O Specifications—266MHz .................................................................................................................. 38
Table 15. Strapping Pin Assignments .................................................................................................................... 39
AMCC
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