Revision 1.10 - July 10, 2008
PPC405EXr – PowerPC 405EXr Embedded Processor
Preliminary Data Sheet
Table 21. I/O Specifications
Notes:
1. Ethernet interface meets timing requirements as defined by IEEE 802.3 standard.
Input (ns)
Output (ns)
Output Current (mA)
Signal
Clock
Notes
Setup Time Hold Time
Valid Delay
(TOV max)
Hold Time
(TOH min)
IOH
(min)
IOL
(min)
(TIS min)
(TIH min)
Ethernet GMII Interface
GMCMDIO
GMCCD
na
2
na
0
na
na
5.51
na
7.23
na
Async
1
1
1
1
1
1
1
1
1
Async
GMCCrS
2
0
na
na
Async
GMCRxD0:7
GMCRxDV
GMCRxEr
1.85
1.95
1.95
0
na
na
GMCRxClk
GMCRxClk
GMCRxClk
GMCGTxClk
GMCGTxClk
GMCGTxClk
0
na
na
0
na
na
GMCTxD0:7
GMCTxEr
2.3
2.4
2.4
2.0
2.0
2.0
5.51
5.51
5.51
7.23
7.23
7.23
GMCTxEn
Ethernet RGMII Interface (n = 0 or 1)
GMCnRxD0:3
GMCnRxCtl
GMCnTxD0:3
GMCnTxCtl
0.7
0.8
1
1
na
na
na
na
GMCnRxClk
GMCnRxClk
GMCnTxClk
GMCnTxClk
1
1
1
1
0.5
0.5
2.7
2.7
5.51
5.51
7.23
7.23
Internal Peripheral Interfaces (not SDRAM or PCI-E)
IICnSData
na
10.46
10.46
10.46
10.46
10.46
10.46
10.46
na
UARTnCTS
na
na
15.75
15.75
15.75
15.75
15.75
15.75
na
UARTnRTS
UARTnDSR
UARTnDCD
UARTnDTR
UARTnRI
UARTnRx
UARTnTx
SCPDI
na
na
na
na
na
na
na
na
na
na
na
na
na
na
15.75
na
10.46
na
SCPDO
na
10.46
10.46
na
USB2Data0:7
USB2Dir
3.9
3.7
3.5
0
0
0
6.3
6.4
2
2
15.75
na
USB2Clk
USB2Clk
USB2Clk
USB2Clk
USB2Next
USB2Stop
DMA Interface
DMAAck0:3
DMAReq0:3
DMAEOT0:3
Interrupts Interface
IRQ0:9
na
na
6.4
5.2
5.3
2
15.75
10.46
1.0
1.0
15.75
na
10.46
na
PerClk
PerClk
PerClk
2.4
2
1
1
15.75
10.46
15.75
10.46
JTAG Interface
TDI
na
15.75
na
na
10.46
na
TDO
TMS
TRST
na
na
60
AMCC Proprietary
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
