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NPE405H-3BA266CZ 参数 Datasheet PDF下载

NPE405H-3BA266CZ图片预览
型号: NPE405H-3BA266CZ
PDF下载: 下载PDF文件 查看货源
内容描述: 的PowerNP NPe405H嵌入式处理器 [PowerNP NPe405H Embedded Processor]
分类和应用: 微控制器和处理器外围集成电路微处理器时钟
文件页数/大小: 70 页 / 1343 K
品牌: AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
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Revision 1.01 – April 18, 2007  
NPe405H – PowerNP NPe405H Embedded Processor  
Data Sheet  
ABSOLUTE MAXIMUM RATINGS  
Table 7. Absolute Maximum Ratings  
The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause  
permanent damage to the device.  
Characteristic  
Supply Voltage (Internal Logic)  
Symbol  
Value  
0 to +2.7  
Unit  
V
VDD  
OVDD  
AVDD  
VIN  
Supply Voltage (I/O Interface)  
0 to +3.6  
V
PLL Supply Voltage 2  
0 to +2.7  
V
-0.6 to (OVDD + 0.6)  
-0.6 to (OVDD + 2.4)  
Input Voltage (3.3V LVTTL receivers)  
Input Voltage (5.0V LVTTL receivers)  
Storage Temperature Range  
Case temperature under bias  
V
VIN  
V
TSTG  
TC  
-55 to +150  
-40 to +120  
×C  
×C  
Notes:  
1. All voltages are specified with respect to ground (GND).  
2. AV should be derived from V using the following circuit:  
DD  
DD  
L1 – 2.2  
µ
H SMT inductor (equivalent to MuRata  
AV  
V
DD  
DD  
LQH3C2R2M34) or SMT chip ferrite bead (equivalent  
to MuRata BLM31A700S)  
L1  
C1 – 3.3  
µ
F SMT tantalum  
C1  
C2  
C3  
C2 – 0.1  
µ
F SMT monolithic ceramic capacitor with X7R  
dielectric or equivalent  
C3 – 0.01  
µ
F SMT monolithic ceramic capacitor with X7R  
dielectric or equivalent  
PACKAGE THERMAL SPECIFICATIONS  
Table 8. Package Thermal Specifications  
The NPe405H is designed to operate within a case temperature range of -40°C to 85°C. Thermal resistance values for the E-  
PBGA packages in a convection environment are as follows:  
Airflow  
ft/min (m/sec)  
Symbol  
Package—Thermal Resistance  
Unit  
0 (0)  
100 (0.51)  
200 (1.02)  
θ
35mm, 580-balls—Junction-to-Case  
2
2
2
°C/W  
°C/W  
JC  
1
θ
13  
12  
11  
35mm, 580-balls—Case-to-Ambient  
CA  
Notes:  
1. For a chip mounted on a JEDEC 2S2P card without a heat sink.  
2. For a chip mounted on a card with at least one signal and two power planes, the following relationships exist:  
a. Case temperature, T is measured at top center of case surface with device soldered to circuit board.  
,
C
b. T = T – P×θ , where T is ambient temperature and P is power consumption.  
CA  
A
C
A
c. TCMax = TJMax – P×θ , where TJMax is maximum junction temperature and P is power consumption.  
JC  
52  
DS2011  
AMCC Proprietary  
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