Revision 5.03 – June 14, 2006
S5320 – PCI Match Maker: Operation Registers
Data Sheet
PCI Incoming Mailbox Register (IMB)
This DWORD register provides a method for receiving
user-defined status or parameter data from the Add-
On bus. PCI bus transactions to this register may be of
any width (byte, word, or DWORD). Only read opera-
tions are supported from this register. Reading from
this register can be a source for Add-On bus interrupt
by enabling interrupt generation through the use of the
Add-On Interrupt Control/Status Register. Byte 3 of
this mailbox can also be controlled via external hard-
ware from the Add-On bus. This register is also
referred to as the Add-On Outgoing Mailbox Register
AOMB).
Incoming Mailbox
1Ch
Register Names:
PCI Address Offset:
Power-up value:
PCI Attribute:
Size:
Undefined
Read Only
32 bits
Figure 26. Incoming Mailbox
31
24 23
16 15
8
7
0
Byte 3
Byte 2
Byte 1
Byte 0
AMCC Confidential and Proprietary
DS1656
61
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
