MAX 9000 Programmable Logic Device Family Data Sheet
Table 24. Interconnect Delays
Symbol
Parameter
Conditions
Speed Grade
-15
Unit
-10
-20
Min Max Min Max Min Max
tLOCAL
tROW
LAB local array delay
0.5
0.9
0.9
4.0
2.7
4.5
2.5
0.5
1.4
1.7
4.5
3.5
5.0
3.5
0.5
2.0
3.0
5.0
4.0
5.5
4.5
ns
ns
ns
ns
ns
ns
ns
FastTrack row delay
(6)
(6)
tCOL
FastTrack column delay
Dedicated input data delay
Dedicated input clock delay
Dedicated input clear delay
tDIN_D
tDIN_CLK
tDIN_CLR
tDIN_IOC
Dedicated input I/O register
clock delay
tDIN_IO
Dedicated input I/O register
control delay
5.5
6.0
6.5
ns
Notes to tables:
(1) These values are specified under the MAX 9000 device recommended operating conditions, shown in Table 15 on
page 27.
(2) See Application Note 77 (Understanding MAX 9000 Timing) for more information on test conditions for t
and t
PD1
PD2
delays.
(3) This parameter is a guideline that is sample-tested only. It is based on extensive device characterization. This
parameter applies for both global and array clocking as well as both macrocell and I/ O cell registers.
(4) Measured with a 16-bit loadable, enabled, up/ down counter programmed in each LAB.
(5) The tLPA parameter must be added to the tLOCAL parameter for macrocells running in low-power mode.
(6) The t and t delays are worst-case values for typical applications. Post-compilation timing simulation
t
ROW , COL,
IOC
or timing analysis is required to determine actual worst-case performance.
The supply power (P) versus frequency (fMAX) for MAX 9000 devices can
be calculated with the following equation:
Power
Consumption
P = PINT + PIO = ICCINT × VCC + PIO
The PIO value, which depends on the device output load characteristics
and switching frequency, can be calculated using the guidelines given in
Application Note 74 (Evaluating Power for Altera Devices). The ICCINT value
depends on the switching frequency and the application logic.
The ICCINT value is calculated with the following equation:
ICCINT
= (A × MCTON) + [B × (MCDEV – MCTON)] + (C × MCUSED
× fMAX × togLC
)
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