16. Understanding Timing in MAX II
Devices
MII51017-2.1
Introduction
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Altera devices provide predictable device performance that is consistent from
simulation to application. Before programming a device, you can determine the
worst-case timing delays for any design. You can approximate propagation delays
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with either the Quartus II Timing Analyzer or the timing models given in this
chapter and the timing parameters listed in individual device data sheets.
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For the most precise timing results, you should use the Quartus II Timing Analyzer,
which accounts for the effects of the secondary factors as mentioned later in this
chapter.
This chapter defines external and internal timing parameters, and illustrates the
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timing models for the MAX II device family.
Familiarity with device architecture and characteristics is assumed. Refer to specific
device or device family data sheets in this handbook for a complete description of the
architecture, and for the specific values of the timing parameters listed in this chapter.
This chapter contains the following sections:
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“External Timing Parameters” on page 16–1
“Internal Timing Parameters” on page 16–2
“Internal Timing Parameters for MAX II UFM” on page 16–3
“Timing Models” on page 16–4
“Calculating Timing Delays” on page 16–5
“Programmable Input Delay” on page 16–7
“Timing Model versus Quartus II Timing Analyzer” on page 16–7
External Timing Parameters
External timing parameters represent actual pin-to-pin timing characteristics. Each
external timing parameter consists of a combination of internal timing parameters.
You can find the values of the external timing parameters in the DC and Switching
Characteristics chapter in the MAX II Device Handbook. These external timing
parameters are worst-case values, derived from extensive performance measurements
and ensured by testing. All external timing parameters are shown in bold type.
Table 16–1 defines external timing parameters for the MAX II family.
© October 2008 Altera Corporation
MAX II Device Handbook