Chapter 12: Real-Time ISP and ISP Clamp for MAX II Devices
12–9
ISP Clamp
Defining the Pin States in Assignment Editor
Another way to define the pin states is through the Assignment Editor. After you have
defined the pin states in the Assignment Editor and compile the design, the
programming file generated will have all the pin state information in it. The following
are the assignment editor states:
1. Click Start Analysis and Synthesis on the toolbar.
2. On the Assignments menu, click Assignment Editor.
3. In the Assignment Editor, under Category, select I/O Features.
4. List down all the pins you wish to clamp when the device is in ISP clamp mode
under the To column. You can use the Node Finder to help you select the pins.
5. Select In-System Programming Clamp State for all the pins under Assignment
Name after you have listed down the pins you wish to set state values.
6. Define the states for each of the pins under Value. You can also choose to clamp the
pins to high, low, tri-state, or sample and sustain the pin state. By default, the pins
are tri-stated when the device enters ISP clamp mode.
Figure 12–11 shows how to define the states of the pins in the Assignment Editor.
Figure 12–11. Assignment Editor
1. Save the assignments and recompile your design.
After you have recompiled the design, the ISP clamp state information will be stored
in the POF. You can also view the settings in the Quartus II Settings File (.qsf).
Running ISP Clamp in the Quartus II Programmer
In the Quartus II Programmer window, make sure that the ISP Clamp check box is
checked before programming the device. Do not add any IPS file in the programmer
as the programmer will use the values specified in the IPS file instead of the values
you set in the Assignment Editor (which is stored in the POF). Figure 12–12 shows the
Quartus II Programmer window with ISP Clamp checkbox. Jam and JBC files created
using the POF will have the pin state information in them.
© October 2008 Altera Corporation
MAX II Device Handbook