12–2
Chapter 12: Real-Time ISP and ISP Clamp for MAX II Devices
Real-Time ISP
In real-time ISP mode, the user flash memory (UFM), programmable logic, and I/O
pins remain operational while programming of the CFM is in progress. The contents
of the CFM will not download into the SRAM after the successful programming of the
CFM. Instead, the device waits for a power cycle to occur. The normal power-up
sequence occurs (CFM downloads to SRAM at power-up) and the device enters user
mode after tCONFIG time. Figure 12–2 shows the flow of real-time ISP.
Figure 12–2. Real-Time ISP Operation
Programming
Data
JTAG
CFM
JTAG
CFM
Power
Cycle
SRAM
SRAM
(Logic Array)
(Logic Array)
Programming of CFM
(Device Remains Operational)
CFM Contents Download
(Device I/Os Tri-Stated)
f
For the tCONFIG value for a specific MAX II device, refer to the DC and Switching
Characteristics chapter in the MAX II Device Handbook.
Real-Time ISP with the Quartus II Software
The programming file formats generated by the Quartus II software that support
these two features are the Programmer Object File (.pof) that is used with the Quartus
II programmer, and the Jam File (.jam) and Jam Byte-Code File (.jbc) that are used
with either the Quartus II programmer or other programming tools.
Ensure that you enable this feature before programming a MAX II device through the
Quartus II programmer. You can enable the real-time ISP feature by selecting the
Enable real-time ISP to allow background programming (for MAX II devices)
option from the Quartus II programmer window. See Figure 12–3.
MAX II Device Handbook
© October 2008 Altera Corporation
ALTERA [ ALTERA CORPORATION ]
