Chapter 11: In-System Programmability Guidelines for MAX II Devices
11–9
ISP via Embedded Processors
Check the VCC Level of the Board During In-System Programming
Using an oscilloscope, monitor the VCCINT signal on your JTAG chain and set the
trigger to the minimum VCC level listed in the recommended operating conditions
table of the appropriate device family data sheet. If a trigger occurs during in-system
programming, the devices may need more current than is being supplied by the
existing power supply. Try replacing the existing power supply with one that
provides more current.
Power-Up Problems
Excessive voltage or current on I/O pins during power-up can cause one of the
devices in the JTAG chain to experience latch-up. Check if any of the devices are hot to
the touch; hot devices have probably experienced latch-up and may have been
damaged. In this situation, check all voltage sources to make sure that excessive
voltage or current is not being fed into the device. Then, replace the affected device
and try programming again.
Random Signals on JTAG Pins
During normal operation, each device’s TAP controller must be in the test-logic-reset
state. To force the device back into this state, try pulling the TMSsignal high and
pulsing the TCKclock signal six times. If the device then powers-up successfully, you
must add a higher pull-down resistor on the TCKsignal.
Software Issues
Failures during in-system programming may occasionally be related to the Quartus II
software. Software-related issues are documented in the Find Answers section under
the Support Center on the Altera website at www.altera.com. Search the database for
information relating to software issues that interfere with in-system programming.
ISP via Embedded Processors
This section provides guidelines for programming ISP-capable devices using the Jam
Standard Test and Programming Language (STAPL) and an embedded processor.
Processor and Memory Requirements
The Jam Byte-Code Player supports 8-bit and higher processors; the ASCII Jam Player
supports 16-bit and higher processors. The Jam Player uses memory in a predictable
manner, which simplifies in-field upgrades by confining updates to the Jam File. The
Jam Player memory uses both ROM and dynamic memory (RAM). ROM is used to
store the Jam Player binary and the Jam File; dynamic memory is used when the Jam
Player is called.
f
For information about how to estimate the maximum amount of RAM and ROM
required by the Jam Player, refer to the Using Jam STAPL for ISP via an Embedded
Processor chapter in the MAX II Device Handbook.
© October 2008 Altera Corporation
MAX II Device Handbook
ALTERA [ ALTERA CORPORATION ]
