11–4
Chapter 11: In-System Programmability Guidelines for MAX II Devices
IEEE Std. 1149.1 Signals
Pull-Up and Pull-Down of JTAG Pins During In-System Programming
A MAX II device operating in in-system programming mode requires four pins: TDI,
TDO, TMS, and TCK. The detailed description and function of each pin can be found in
the IEEE 1149.1 (JTAG) Boundary-Scan Testing for MAX II Devices chapter in the MAX II
Device Handbook.
Three of the four JTAG pins have internal weak pull-up or pull-down resistors. The
TDIand TMSpins have internal weak pull-up resistors while the TCKpin has an
internal weak pull-down resistor. However, for device programming in a JTAG chain,
there might be devices that do not have internal pull-up or pull-down resistors. Altera
recommends to externally pull TMS high through 10-kΩ and TCKlow through 1-kΩ
resistors. Pulling-up the TDIsignal externally for the MAX II device is optional.
Figure 11–1 shows the external pull-up and pull-down for TMSand TCKof the JTAG
chain. The TDOpin does not have internal pull-up or pull-down resistors, and does
not require external pull-up or pull-down resistors.
Figure 11–1. External Pull-Up and Pull-Down Resistors for TMS and TCK of a JTAG Chain
10-Pin Male Header
(Top View)
VCC
VCC
10 kΩ
Other ISP-Capable
Other ISP-Capable
Device
Device
MAX II Device
TDI TDO
TDI
TDO
TDI
TMS
TDO
TCK
TMS TCK
TMS TCK
GND
1kΩ
The TMSpin is pulled high so that the TAP controller will remain in the
TEST_LOGIC/RESETstate even if there is input from TCK. To prevent TCKfrom
pulsing high, the TCKpin is pulled low during power-up. Pulling TCKhigh is not
recommended because an increase in the power supply to the pull-up resistor causes
the TCKto pulse high; thus, it is possible for the TAP controller to reach an unintended
state.
IEEE Std. 1149.1 Signals
This section provides guidelines for programming with the IEEE Std. 1149.1 (JTAG) interface.
TCK Signal
Most in-system programming failures are caused by a noisy TCKsignal. Noisy
transitions on rising or falling edges can cause incorrect clocking of the IEEE Std.
1149.1 Test Access Port (TAP) controller. Incorrect clocking can cause the state
machine to transition to an unknown state, leading to in-system programming
failures.
MAX II Device Handbook
© October 2008 Altera Corporation
ALTERA [ ALTERA CORPORATION ]
