11–2
Chapter 11: In-System Programmability Guidelines for MAX II Devices
General ISP Guidelines
Input Voltages
The MAX II Device Family Data Sheet lists the MAX II device input voltage
specification in the absolute maximum ratings and the recommended operating
conditions tables. The input voltages in the absolute maximum rating table refers to
the maximum voltage which the device can tolerate before risking permanent
damage.
The recommended operating conditions table specify the voltage range for safe device
operation. Make sure all pins that transition during in-system programming do not
have a ground or VCC overshoot. Overshoot problems typically occur on free-running
clocks or data buses that can toggle during in-system programming. All pins that
have an overshoot greater than 1.0 V must have series termination.
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For more information about the recommended operating conditions and the absolute
maximum ratings for MAX II devices and termination, refer to the DC and Switching
Characteristics chapter in the MAX II Device Handbook and AN 75: High-Speed Board
Designs, respectively.
UFM Operations During In-System Programming
If your design allows you to access the MAX II UFM (write or erase), you must ensure
that all the erase or write operations of the UFM are completed before starting any ISP
session (including stand-alone verify, examine, setting security bit, and reading the
contents of the UFM). You should never start an ISP session when any erase or write
operation of the UFM is on going, as this may put the device in an unrecoverable
state. However, this restriction does not apply to the read operation of the UFM.
If you cannot ensure that any erase or write operation of the UFM is complete before
attempting an ISP operation to the MAX II device, then you should enable the real-
time ISP feature. When used properly, this feature can help guard against any
UFM/ISP operation contention. When real-time ISP is enabled, the programming
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algorithm used by the Quartus II software or the Jam™ (.jam)/Jam Byte-Code (.jbc)
files will wait 500 ms before it begins any operation. This is the same amount of time it
takes for one UFM sector to be erased (that is, the real-time ISP programming
algorithm waits for what may have been a previously started UFM erase sequence to
complete).
However, if you are using a real-time ISP feature, no other UFM operations are
allowed after that time (no address shifting, no data shifting, and no read, write, or
erase operations). This can be controlled by monitoring the RTP_BUSYsignal on the
altufm_none megafunction. When real-time ISP is under way, the RTP_BUSYoutput
signal on the UFM block goes high. You can monitor this signal and ensure that all
UFM operations from the logic array cease until real-time ISP is complete. This user-
generated control logic is only necessary for the altufm_none megafunction, which
provides no auto-generated logic. The other interfaces for the altufm megafunction
(altufm_parallel, altufm_spi, altufm_i2c) contain control logic that automatically
monitors the RTP_BUSYsignal and ceases operations to the UFM when a real-time
ISP operation is under way.
MAX II Device Handbook
© October 2008 Altera Corporation
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