9–32
Chapter 9: Using User Flash Memory in MAX II Devices
Software Support for UFM Block
Figure 9–33. WREN Operation Sequence
nCS
0
1
2
3
4
5 6 7
SCK
SI
8-bit
Instruction
06H
MSB
High Impendance
SO
WRDI (Write Disable)
After the UFM is programmed, WRDIcan be issued to set WENback to 0, disabling
WRITEand preventing inadvertent writing to the UFM. WRDIis issued through the
following sequence, as shown in Figure 9–34:
1. nCSis pulled low.
2. Opcode 00000100is transmitted to set WENto 0in the status register.
3. After the transmission of the eighth bit of WRDI, the interface is in wait state
(waiting for nCSto be pulled back to high). Any transmission after this is ignored.
4. nCSis pulled back to high.
Figure 9–34. WRDI Operation Sequence
nCS
0
1
2
3
4
5 6 7
SCK
SI
8-bit
Instruction
04H
MSB
High Impendance
SO
RDSR (Read Status Register)
The content of the status register can be read by issuing RDSR. Once RDSRis received,
the interface outputs the content of the status register through the SOport. Although
the most significant four bits (Bit 7 to Bit 4) do not hold valuable information, all eight
bits in the status register will output through the SOport. This allows future
compatibility when Bit 7 to Bit 4 have new meaning in the status register. During the
MAX II Device Handbook
© October 2008 Altera Corporation
ALTERA [ ALTERA CORPORATION ]
