Chapter 9: Using User Flash Memory in MAX II Devices
9–31
Software Support for UFM Block
UFM-ERASE
The UFM-ERASE (CE) instruction erases both UFM sector 0 and sector 1 for SPI
Extended Mode. While for SPI Base mode, the CE instruction has the same
functionality as the SECTOR-ERASE (SE) instruction, which erases UFM sector 0 only.
WENbit and the UFM sectors must not be protected for CE operation to be successful.
nCSmust be driven high before the instruction is executed internally. You may poll
the nRDYbit in the software status register for the completion of the internal self-
timed CE cycle. For both SPI Extended mode and Base mode, the UFM-ERASE
operation is performed in the following sequence as shown in Figure 9–32:
1. nCSis pulled low.
2. Opcode 01100000is transmitted into the interface.
3. nCSis pulled back to high.
Figure 9–32 shows the UFM-ERASEoperation sequence.
Figure 9–32. UFM-ERASE Operation Sequence
nCS
0
1
2
3
4
5 6 7
SCK
SI
8-bit
Instruction
60H
MSB
High Impendance
SO
WREN (Write Enable)
The interface is powered-up in the write disable state. Therefore, WENin the status
register (see Table 9–11) is 0at power-up. Before any write is allowed to take place,
WRENmust be issued to set WENin the status register to 1. If the interface is in read-
only mode, WRENdoes not have any effect on WEN, since the status register does not
exist. Once the WENis set to 1, it can be reset by the WRDIinstruction; the WRITEand
SECTOR-ERASEinstruction will not reset the WENbit. WRENis issued through the
following sequence, as shown in Figure 9–33:
1. nCSis pulled low.
2. Opcode 00000110is transmitted into the interface to set WENto 1in the status
register.
3. After the transmission of the eighth bit of WREN, the interface is in wait state
(waiting for nCSto be pulled back to high). Any transmission after this is ignored.
4. nCSis pulled back to high.
© October 2008 Altera Corporation
MAX II Device Handbook
ALTERA [ ALTERA CORPORATION ]
