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EPM240T100C5 参数 Datasheet PDF下载

EPM240T100C5图片预览
型号: EPM240T100C5
PDF下载: 下载PDF文件 查看货源
内容描述: [最大II器件]
分类和应用: 可编程逻辑器件输入元件PC
文件页数/大小: 295 页 / 3815 K
品牌: ALTERA [ ALTERA CORPORATION ]
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Chapter 9: Using User Flash Memory in MAX II Devices  
9–9  
UFM Operating Modes  
UFM Operating Modes  
There are three different modes for the UFM block:  
Read/Stream Read  
Program (Write)  
Erase  
During program, address and data can be loaded concurrently. You can manipulate  
the UFM interface controls as necessary to implement the specific protocol provided  
the UFM timing specifications are met. Figure 9–7 through Figure 9–10 show the  
control waveforms for accessing UFM in three different modes. For PROGRAMmode  
(Figure 9–9) and ERASEmode (Figure 9–10), the PROGRAMand ERASEsignals are not  
obligated to assert immediately after loading the address and data. They can be  
asserted anytime after the address register and data register have been loaded. Do not  
assert the READ, PROGRAM, and ERASEsignals or shift data and address into the UFM  
after entering the real-time ISP mode. You can use the RTP_BUSYsignal to detect the  
beginning and end of real-time ISP operation and generate control logic to stop all  
UFM port operations. This user-generated control logic is only necessary for the  
altufm_none megafunction, which provides no auto-generated logic. The other  
interfaces for the altufm megafunction (altufm_parallel, altufm_spi, altufm_i2c)  
contain control logic to automatically monitor the RTP_BUSYsignal and will cease  
operations to the UFM when a real-time ISP operation is in progress.  
1
You can program the UFM and CFM blocks independently without overwriting the  
other block which is not programmed. The Quartus II programmer provides the  
options to program the UFM and CFM blocks individually or together (the entire  
MAX II Device).  
f
f
Refer to the In-System Programmability Guidelines for MAX II Devices chapter in the  
MAX II Device Handbook for guidelines about using ISP and real-time ISP while  
utilizing the UFM block within your design.  
Refer to the MAX II Architecture chapter in the MAX II Device Handbook for a complete  
description of the device architecture, and for the specific values of the timing  
parameters listed in this chapter.  
Read/Stream Read  
The three control signals, PROGRAM, ERASE, and BUSYare not required during read or  
stream read operation. To perform a read operation, the address register has to be  
loaded with the reference address where the data is or is going to be located in the  
UFM. The address register can be stopped from incrementing or shifting addresses  
from ARDinby stopping the ARCLKclock pulse. DRSHFTmust be asserted low at the  
next rising edge of DRCLKto load the data from the UFM to the data register. To shift  
the bits from the register, 16 clock pulses have to be provided to read 16-bit wide data.  
You can use DRCLKto control the read time or disable the data register by  
discontinuing the DRCLK clock pulse. Figure 9–7 shows the UFM control waveforms  
during read mode.  
© October 2008 Altera Corporation  
MAX II Device Handbook  
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