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EPM240T100C5 参数 Datasheet PDF下载

EPM240T100C5图片预览
型号: EPM240T100C5
PDF下载: 下载PDF文件 查看货源
内容描述: [最大II器件]
分类和应用: 可编程逻辑器件输入元件PC
文件页数/大小: 295 页 / 3815 K
品牌: ALTERA [ ALTERA CORPORATION ]
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Chapter 9: Using User Flash Memory in MAX II Devices  
9–5  
UFM Functional Description  
UFM Address Register  
The MAX II UFM block is organized as a 512 × 16 memory. Since the UFM block is  
organized into two separate sectors, the MSB of the address indicates the sector that  
will be in action; 0 is for sector 0 (UFM0) while 1 is for sector 1 (UFM1). An ERASE  
instruction erases the content of the specific sector that is indicated by the MSB of the  
address register. Figure 9–2 shows the selection of the UFM sector in action using the  
MSB of the address register.  
Refer to “Erase” on page 9–11 for more information about ERASEmode.  
Figure 9–2. Selection of the UFM Sector Using the MSB of the Address Register  
Sector 0  
Address Register  
UFM Block  
0
1
ARDin  
A0  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
LSB  
MSB  
UFM Block  
Sector 1  
ARClk  
Three control signals exist for the address register: ARSHFT, ARCLK, and ARDin.  
ARSHFTis used as both a shift-enable control signal and an auto-increment signal. If  
the ARSHFTsignal is high, a rising edge on ARCLKwill load address data serially from  
the ARDinport and move data serially through the register. A clock edge with the  
ARSHFTsignal low increments the address register by 1. This implements an auto-  
increment of the address to allow data streaming. When a program, read, or an erase  
sequence is executing, the address that is in the address register becomes the active  
UFM location.  
UFM Data Register  
The UFM data register is 16 bits wide with four control signals: DRSHFT, DRCLK,  
DRDin, and DRDout. DRSHFTdistinguishes between clock edges that move data  
serially from DRDinor to DRDoutand clock edges that latch parallel data from the  
UFM sectors. If the DRSHFTsignal is high, a clock edge moves data serially through  
the registers from DRDinto DRDout. If the DRSHFTsignal is low, a clock edge  
captures data from the UFM sector pointed by the address register in parallel. The  
MSB is the first bit that will be seen at DRDout. The data register DRSHFTsignal will  
also be used to enable the UFM for reading data. When the DRSHFTsignal is low, the  
UFM latches data into the data register. Figure 9–3 shows the UFM data register.  
© October 2008 Altera Corporation  
MAX II Device Handbook  
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