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EPF6016TC144-2 参数 Datasheet PDF下载

EPF6016TC144-2图片预览
型号: EPF6016TC144-2
PDF下载: 下载PDF文件 查看货源
内容描述: [Loadable PLD, CMOS, PQFP144, TQFP-144]
分类和应用: 时钟LTE输入元件可编程逻辑
文件页数/大小: 52 页 / 374 K
品牌: ALTERA [ ALTERA CORPORATION ]
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FLEX 6000 Programmable Logic Device Family Data Sheet  
Figure 14. IOE Connection to Column Interconnect  
Each IOE can drive two  
column interconnect channels.  
Each IOE data and OE signal is  
driven to a local interconnect.  
IOE  
IOE  
FastFLEX I/O: An  
LE can drive a  
pin through a local  
interconnect for faster  
clock-to-output times.  
LAB  
Any LE can drive a  
pin through the row  
and local interconnect.  
Column Interconnect  
Row Interconnect  
3.3-V FLEX 6000 devices support the SameFrame pin-out feature for  
FineLine BGA packages. The SameFrame pin-out feature is the  
arrangement of balls on FineLine BGA packages such that the lower-ball-  
count packages form a subset of the higher-ball-count packages.  
SameFrame pin-outs provide the flexibility to migrate not only from  
device to device within the same package, but also from one package to  
another. A given printed circuit board (PCB) layout can support multiple  
device density/package combinations. For example, a single board layout  
can support an EPF6016A device in a 100-pin FineLine BGA package or an  
EPF6024A device in a 256-pin FineLine BGA package.  
SameFrame  
Pin-Outs  
The Altera software packages provide support to design PCBs with  
SameFrame pin-out devices. Devices can be defined for present and future  
use. The Altera software packages generate pin-outs describing how to lay  
out a board to take advantage of this migration (see Figure 15).  
Altera Corporation  
25  
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