3–4
Chapter 3: Serial Configuration Devices (EPCS1, EPCS4, EPCS16, EPCS64, and EPCS128) Data Sheet
Active Serial FPGA Configuration
There are four signals on the serial configuration device that interface directly with
the FPGA’s control signals. The serial configuration device signals
DATA, DCLK, ASDI,
and
nCS
interface with
DATA0, DCLK, ASDO,
and
nCSO
control signals on the FPGA,
respectively.
shows a serial configuration device programmed via a
download cable, which configures an FPGA in AS mode.
shows a serial
configuration device programmed using the APU or a third-party programmer
configuring an FPGA in AS configuration mode.
f
For more information about the serial configuration device pin description, refer to
Figure 3–2.
Altera FPGA Configuration in AS Mode (Serial Configuration Device Programmed Using Download Cable)
V
CC
(1)
10 k
V
CC
(1)
V
CC
(1)
10 k
Altera FPGA
CONF_DONE
nSTATUS
Serial
Configuration
Device
(2)
10 k
DATA
DCLK
nCS
ASDI
DATA0
DCLK
nCSO
ASDO
nCONFIG
nCEO
N.C.
10 k
nCE
MSEL[]
(3)
Pin 1
V
CC
(1)
Notes to
(1) For the V
CC
value, refer to the respective FPGA family handbook Configuration chapter.
(2) Serial configuration devices cannot be cascaded.
(3) Connect the FPGA
MSEL[]
input pins to select the AS configuration mode. For details, refer to the respective FPGA family chapter in the
(4) For more information about configuration pin I/O requirements in an AS scheme for an Altera FPGA, refer to the respective FPGA family handbook
Configuration chapter.
ALTERA [ ALTERA CORPORATION ]
