Chapter 3: Serial Configuration Devices (EPCS1, EPCS4, EPCS16, EPCS64, and EPCS128) Data Sheet
Active Serial FPGA Configuration
3–3
The serial configuration devices are designed to configure the Cyclone series and all
device families in the Stratix series except the Stratix device family. It cannot configure
other existing Altera FPGA device families.
shows the serial configuration device block diagram.
Figure 3–1.
Serial Configuration Device Block Diagram
Serial Configuration Device
nCS
DCLK
Control
Logic
DATA
I/O Shift
Register
ASDI
Address Counter
Data Buffer
Status Register
Decode Logic
Memory
Array
Accessing Memory in Serial Configuration Devices
You can access the unused memory locations of the serial configuration device to store
or retrieve data through the Nios processor and SOPC Builder. SOPC Builder is an
Altera tool for creating bus-based (especially microprocessor-based) systems in Altera
devices. SOPC Builder assembles library components such as processors and
memories into custom microprocessor systems.
SOPC Builder includes the EPCS device controller core, which is an interface core
specifically designed to work with the serial configuration device. With this core, you
can create a system with a Nios embedded processor that allows software access to
any memory location within the serial configuration device.
f
For more information about accessing memory within the serial configuration device,
refer to the
Active Serial FPGA Configuration
The following Altera FPGAs support Active Serial (AS) configuration scheme with
serial configuration devices:
■
■
■
Arria series
Cyclone series
all device families in the Stratix series except the Stratix device family
1
This section is only relevant for FPGAs that support the AS configuration scheme.
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