8–4
Chapter 8: External Memory Interfaces in the Cyclone III Device Family
Cyclone III Device Family Memory Interfaces Pin Support
Table 8–1. Cyclone III Device DQS and DQ Bus Mode Support for Each Side of the Device (Part 2 of 4)
Device
Package
Left
144-pin EQFP
Side
Number
×8
Groups
0
0
1
Number
×9
Groups
0
0
0
0
0
0
0
0
1
1
2
2
0
0
0
0
0
0
0
0
1
0
1
1
1
1
2
2
2
2
2
2
Number
×16
Groups
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
2
2
2
2
Number
×18
Groups
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
2
2
2
2
Number
×32
Groups
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
1
1
1
1
Number
×36
Groups
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
1
1
1
1
Right
Top
Left
Bottom
Right
Top
Left
256-pin FineLine
BGA/256-pin Ultra
FineLine BGA
Top
Bottom
Left
144-pin EQFP
1
0
0
1
EP3C10
164-pin MBGA
Bottom
Right
1
1
1
2
2
0
0
1
Right
Top
Left
Bottom
Right
Top
Left
EP3C16
240-pin PQFP
1
0
0
1
164-pin MBGA
Bottom
Right
Top
Bottom
Left
Top
Bottom
Left
Right
Top
Bottom
1
1
1
1
1
1
1
2
2
4
4
4
4
256-pin FineLine
BGA/256-pin
Ultra FineLine
BGA
484-pin FineLine
BGA/484-pin
Ultra FineLine
BGA
Right
Cyclone III Device Handbook
Volume 1
July 2012 Altera Corporation