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EP3C16Q144C6ES 参数 Datasheet PDF下载

EP3C16Q144C6ES图片预览
型号: EP3C16Q144C6ES
PDF下载: 下载PDF文件 查看货源
内容描述: 的Cyclone III器件手册 [Cyclone III Device Handbook]
分类和应用:
文件页数/大小: 274 页 / 7308 K
品牌: ALTERA [ ALTERA CORPORATION ]
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8–8
Chapter 8: External Memory Interfaces in the Cyclone III Device Family
Cyclone III Device Family Memory Interfaces Pin Support
f
For more information about device package outline, refer to the
page.
DQS
pins are listed in the Cyclone III and Cyclone III LS pin tables as
DQSXY,
in which
X
indicates the
DQS
grouping number and
Y
indicates whether the group is located on
the top (T), bottom (B), left (L) or right (R) side of the device. Similarly, the
corresponding
DQ
pins are marked as
DQXY,
in which the
X
denotes the DQ grouping
number and
Y
denotes whether the group is located on the top (T), bottom (B), left (L)
or right (R) side of the device. For example,
DQS2T
indicates a
DQS
pin belonging to
group
2,
located on the top side of the device. Similarly, the
DQ
pins belonging to that
group is shown as
DQ2T.
1
Each
DQ
group is associated with its corresponding
DQS
pins, as defined in the Cyclone
III and Cyclone III LS pin tables; for example:
For DDR2 or DDR SDRAM, ×8
DQ
group
DQ3B[7:0]
pins are associated with
the
DQS3B
pin (same 3B group index)
For QDR II SRAM, ×9 Q read-data group
DQ3L[8..0]
pins are associated with
DQS2L/CQ3L
and
DQS3L/CQ3L#
pins (same 3L group index)
The Quartus
®
II software issues an error message if a
DQ
group is not placed properly
with its associated
DQS.
shows the location and numbering of the
DQS, DQ,
or CQ# pins in the
Cyclone III device family I/O banks.
1
For maximum timing performance, Altera recommends that the data groups for
external memory interfaces must always be within the same side of a device.
Cyclone III Device Handbook
Volume 1
July 2012 Altera Corporation