Configuring Cyclone II Devices
it feeds the next device’s nCEpin. After the first device in the chain
completes configuration, its nCEOpin transitions low to activate the
second device's nCEpin, which prompts the second device to begin
configuration. You can leave the nCEOpin of the last device unconnected
or use it as a user I/O pin after configuration. The nCEOpin is a
dual-purpose pin in Cyclone II devices.
1
The Quartus II software sets the Cyclone II device nCEOpin as
an output pin driving to ground by default. If the device is in a
chain, and the nCEOpin is connected to the next device’s nCE
pin, you must make sure that the nCEOpin is not used as a user
I/O pin after configuration. This software setting is in the
Dual-Purpose Pins tab of the Device & Pin Options dialog box
in Quartus II software.
Connect all other configuration pins (nCONFIG, nSTATUS, DCLK, DATA0,
and CONF_DONE) to every Cyclone II device in the chain. The
configuration signals may require buffering to ensure signal integrity and
prevent clock skew problems. Buffer the DCLKand DATAlines for every
fourth device.
When configuring multiple devices, configuration does not begin until all
devices release their OEor nSTATUSpins. Similarly, since all device
CONF_DONEpins are tied together, all devices initialize and enter user
mode at the same time.
You should not pull CONF_DONElow to delay initialization. Instead, use
the Quartus II software’s User-Supplied Start-Up Clock option to
synchronize the initialization of multiple devices that are not in the same
configuration chain. Devices in the same configuration chain initialize
together since their CONF_DONEpins are tied together.
Since all nSTATUSand CONF_DONEpins are connected, if any device
detects an error, configuration stops for the entire chain and the entire
chain must be reconfigured. For example, if there is an error when
configuring the first Cyclone II device, it resets the chain by pulling its
nSTATUSpin low. This low signal drives the OEpin low on the enhanced
configuration device and drives nSTATUSlow on all FPGAs, which
causes them to enter a reset state.
If the Auto-restart configuration after error option is turned on, the
devices automatically initiate reconfiguration if an error occurs. The
FPGAs release their nSTATUSpins after a reset time-out period (40 µs
maximum). When all the nSTATUSpins are released and pulled high, the
configuration device reconfigures the chain. If the Auto-restart
configuration after error option is turned off, a microprocessor or
controller must monitor the nSTATUSpin for errors and then pulse
Altera Corporation
February 2007
13–39
Cyclone II Device Handbook, Volume 1
ALTERA [ ALTERA CORPORATION ]
