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EP2C8T144I8N 参数 Datasheet PDF下载

EP2C8T144I8N图片预览
型号: EP2C8T144I8N
PDF下载: 下载PDF文件 查看货源
内容描述: Cyclone II器件手册,卷1 [Cyclone II Device Handbook, Volume 1]
分类和应用: 现场可编程门阵列可编程逻辑时钟
文件页数/大小: 470 页 / 5765 K
品牌: ALTERA [ ALTERA CORPORATION ]
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PS Configuration  
nCONFIGlow for at least 2 µs to restart configuration. The microprocessor  
or controller can only transition the nCONFIGpin low if the pin is under  
system control and not tied to VCC  
.
The enhanced configuration devices support parallel configuration of up  
to eight devices. The n-bit (n = 1, 2, 4, or 8) PS configuration mode allows  
enhanced configuration devices to concurrently configure a chain of  
FPGAs. These devices do not have to be the same device family or  
density; they can be any combination of Altera FPGAs with different  
designs. An individual enhanced configuration device DATApin is  
available for each targeted FPGA. Each DATAline can also feed a chain of  
FPGAs. Figure 13–15 shows how to concurrently configure multiple  
devices using an enhanced configuration device.  
13–40  
Cyclone II Device Handbook, Volume 1  
Altera Corporation  
February 2007  
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