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EP2C35F672C8N 参数 Datasheet PDF下载

EP2C35F672C8N图片预览
型号: EP2C35F672C8N
PDF下载: 下载PDF文件 查看货源
内容描述: Cyclone II器件手册,卷1 [Cyclone II Device Handbook, Volume 1]
分类和应用: 现场可编程门阵列可编程逻辑LTE时钟
文件页数/大小: 470 页 / 5764 K
品牌: ALTERA [ ALTERA CORPORATION ]
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Cyclone II Architecture  
Table 2–20. Cyclone II MultiVolt I/O Support (Part 2 of 2)  
Note (1)  
Input Signal  
Output Signal  
V
CCIO (V)  
1.5 V  
1.8 V  
2.5 V  
3.3 V  
1.5 V  
1.8 V  
2.5 V  
3.3 V  
3.3  
v
v
v (4)  
v (6)  
v (6)  
v (6)  
Notes to Table 2–20:  
(1) The PCI clamping diode must be disabled to drive an input with voltages higher than VCCIO  
.
(2) These input values overdrive the input buffer, so the pin leakage current is slightly higher than the default value.  
To drive inputs higher than VCCIO but less than 4.0 V, disable the PCI clamping diode and turn on Allow voltage  
overdrive for LVTTL/LVCMOS input pins option in Device setting option in the Quartus II software.  
(3) When VCCIO = 1.8-V, a Cyclone II device can drive a 1.5-V device with 1.8-V tolerant inputs.  
(4) When VCCIO = 3.3-V and a 2.5-V input signal feeds an input pin or when VC CIO = 1.8-V and a 1.5-V input signal  
feeds an input pin, the VCCIO supply current will be slightly larger than expected. The reason for this increase is  
that the input signal level does not drive to the VCCIO rail, which causes the input buffer to not completely shut off.  
(5) When VCCIO = 2.5-V, a Cyclone II device can drive a 1.5-V or 1.8-V device with 2.5-V tolerant inputs.  
(6) When VCCIO = 3.3-V, a Cyclone II device can drive a 1.5-V, 1.8-V, or 2.5-V device with 3.3-V tolerant inputs.  
Altera Corporation  
February 2007  
2–61  
Cyclone II Device Handbook, Volume 1  
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