Memory Modes
■
■
■
■
■
■
■
■
■
4K × 1
2K × 2
1K × 4
512 × 8
512 × 9
256 × 16
256 × 18
128 × 32
128 × 36
Figure 8–7 shows timing waveforms for read and write operations in
single-port mode.
Figure 8–7. Cyclone II Single-Port Timing Waveforms
inclock
wren
an
a0
a1
a2
a3
a4
a5
address
an-1
a6
data (1)
din-1
din
din4
din5
din6
q (synch)
din-2
din-1
din-1
din
din
dout0
dout0
dout1
dout1
dout2
dout2
dout3
dout3
din4
din4
din5
q (asynch)
Note to Figure 8–7:
(1) The crosses in the datawaveform during read mean “don’t care.”
Simple Dual-Port Mode
Simple dual-port mode supports simultaneous read and write operation.
Figure 8–8 shows the simple dual-port memory configuration.
8–10
Cyclone II Device Handbook, Volume 1
Altera Corporation
February 2008
ALTERA [ ALTERA CORPORATION ]
