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EP1SGX40GF1020I6 参数 Datasheet PDF下载

EP1SGX40GF1020I6图片预览
型号: EP1SGX40GF1020I6
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 4697 CLBs, 41250-Cell, CMOS, PBGA1020, 33 X 33 MM, 1 MM PITCH, FBGA-1020]
分类和应用: 可编程逻辑
文件页数/大小: 272 页 / 1348 K
品牌: ALTERA [ ALTERA CORPORATION ]
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Figure 2–31. EP1SGX40 Receiver PLL Recovered Clock to Fast Regional Clock  
Connection  
Stratix GX  
PLD  
FCLK[1..0] Transceiver Blocks  
Block 0  
Block 1  
Block 4  
Block 2  
Block 3  
FCLK[1..0]  
Table 2–10 summarizes the possible clocking connections for the  
transceivers.  
Table 2–10. Possible Clocking Connections for Transceivers (Part 1 of 2)  
Destination  
Source  
Transmitter  
PLL  
Receiver  
PLL  
GCLK  
RCLK  
FCLK  
IQ Lines  
REFCLKB  
Transmitter PLL  
Receiver PLL  
GCLK  
v
v
v
v (1)  
v
v
v
v
v
v (1)  
v
v
v
v
v
v
v
v
RCLK  
FCLK  
2–36  
Altera Corporation  
June 2006  
Stratix GX Device Handbook, Volume 1  
 
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