Stratix GX Transceivers
Table 2–10. Possible Clocking Connections for Transceivers (Part 2 of 2)
Destination
GCLK RCLK
Source
Transmitter
PLL
Receiver
PLL
FCLK
IQ Lines
IQ lines
v (2)
v (2)
Notes to Table 2–10:
(1) REFCLKBfrom transceiver block 0 and transceiver block 4 does not drive the inter-transceiver lines or the GCLK
lines.
(2) Inter-transceiver line 0 and inter-transceiver line 1 drive the transmitter PLL, while inter-transceiver line 2 drives
the receiver PLLs.
Other important features of the Stratix GX transceivers are the power
down and reset capabilities, the external voltage reference and bias
circuitry, and hot swapping.
Other
Transceiver
Features
Individual Power-Down & Reset for the Transmitter & Receiver
Stratix GX transceivers offer a power saving advantage with their ability
to shut off functions that are not needed. The device can individually
reset the receiver and transmitter blocks and the PLLs. The Stratix GX
device can either globally power down and reset the transmitter and
receiver channels or do each channel separately. Table 2–11 shows the
connectivity between the reset signals and the Stratix GX logical blocks.
Altera Corporation
June 2006
2–37
Stratix GX Device Handbook, Volume 1