Stratix GX Transceivers
Figure 2–24. BIST PRBS Data Path
BIST PRBS
Verifier
BIST
Incremental
Verifier
Word
Aligner
Deserializer
Channel
Aligner
Rate
Matcher
Phase
Compensation
FIFO
8B/10B
Decoder
Byte
Deserializer
Clock
Recovery
Unit
Phase
Compensation
FIFO
Byte
Serializer
Serializer
8B/10B
Encoder
BIST
Generator
Active Path
Non-active Path
BIST PRBS
Generator
Figure 2–25. BIST Incremental Data Path
BIST PRBS
Verifier
BIST
Incremental
Verifier
Word
Aligner
Deserializer
Channel
Aligner
Rate
Matcher
Phase
Compensation
FIFO
8B/10B
Decoder
Byte
Deserializer
Clock
Recovery
Unit
Phase
Compensation
FIFO
Byte
Serializer
Serializer
8B/10B
Encoder
BIST
Generator
Active Path
BIST PRBS
Generator
Non-active Path
Table 2–9 shows the BIST data output and verifier alignment pattern.
Table 2–9. BIST Data Output & Verifier Alignment Pattern (Part 1 of 2)
BIST Mode
Output
Polynomials
Verifier Word Alignment Pattern
1000000011111111
1111111111
28 – 1
x8 + x7 + x5 + x3 + 1
x10 + x7 + 1
PRBS 8-bit
210 – 1
PRBS 10-bit
Altera Corporation
June 2006
2–29
Stratix GX Device Handbook, Volume 1
ALTERA [ ALTERA CORPORATION ]
