Stratix GX Transceivers
Pre-emphasis percentage is defined as VPP/VS – 1, where VPP is the
differential emphasized voltage (peak-to-peak) and VS is the differential
steady-state voltage (peak-to-peak).
Programmable Transmitter Termination
The programmable termination can be statically set in the Quartus II
software. The values are 100 Ω, 120 Ω, 150 Ω, and off. Figure 2–9 shows the
setup for programmable termination.
Figure 2–9. Programmable Transmitter Termination
V
CM
50, 60, or 75
Programmable
Output
Driver
Receiver Path
This section describes the data path through the Stratix GX receiver (refer
to Figure 2–2 on page 2–4). Data travels through the Stratix GX receiver
via the following modules:
■
■
■
■
■
■
■
Input buffer
Clock Recovery Unit (CRU)
Deserializer
Pattern detector and word aligner
Rate matcher and channel aligner
8B/10B decoder
Receiver logic array interface
Receiver Input Buffer
The Stratix GX receiver input buffer supports the 1.5-V PCML I/O
standard at a rate up to 3.1875 Gbps. Additional I/O standards, LVDS,
3.3-V PCML, and LVPECL can be supported when AC coupled. The
common mode of the input buffer is 1.1 V. The receiver can support
Stratix GX-to-Stratix GX DC coupling.
Altera Corporation
June 2006
2–13
Stratix GX Device Handbook, Volume 1
ALTERA [ ALTERA CORPORATION ]
