欢迎访问ic37.com |
会员登录 免费注册
发布采购

EP1SGX40GF1020I6 参数 Datasheet PDF下载

EP1SGX40GF1020I6图片预览
型号: EP1SGX40GF1020I6
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 4697 CLBs, 41250-Cell, CMOS, PBGA1020, 33 X 33 MM, 1 MM PITCH, FBGA-1020]
分类和应用: 可编程逻辑
文件页数/大小: 272 页 / 1348 K
品牌: ALTERA [ ALTERA CORPORATION ]
 浏览型号EP1SGX40GF1020I6的Datasheet PDF文件第16页浏览型号EP1SGX40GF1020I6的Datasheet PDF文件第17页浏览型号EP1SGX40GF1020I6的Datasheet PDF文件第18页浏览型号EP1SGX40GF1020I6的Datasheet PDF文件第19页浏览型号EP1SGX40GF1020I6的Datasheet PDF文件第21页浏览型号EP1SGX40GF1020I6的Datasheet PDF文件第22页浏览型号EP1SGX40GF1020I6的Datasheet PDF文件第23页浏览型号EP1SGX40GF1020I6的Datasheet PDF文件第24页  
Figure 2–5. Serializer  
D9  
D8  
D7  
D9  
D8  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
10  
Serial data  
out (to output  
buffer)  
Low-speed  
parallel clock  
High-speed  
serial clock  
Transmit Buffer  
The Stratix GX transceiver buffers support the 1.5-V pseudo current  
mode logic (PCML) I/O standard at a rate up to 3.1875 Gbps, across up to  
40 inches of FR4 trace, and across 2 connectors. Additional I/O standards,  
LVDS, 3.3-V PCML, LVPECL, can be supported when AC coupled. The  
common mode of the output driver is 750 mV.  
The output buffer, as shown in Figure 2–6, consists of a programmable  
output driver and a programmable pre-emphasis circuit.  
2–10  
Stratix GX Device Handbook, Volume 1  
Altera Corporation  
June 2006  
 复制成功!