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EP1SGX40GF1020I6 参数 Datasheet PDF下载

EP1SGX40GF1020I6图片预览
型号: EP1SGX40GF1020I6
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 4697 CLBs, 41250-Cell, CMOS, PBGA1020, 33 X 33 MM, 1 MM PITCH, FBGA-1020]
分类和应用: 可编程逻辑
文件页数/大小: 272 页 / 1348 K
品牌: ALTERA [ ALTERA CORPORATION ]
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Stratix GX Architecture  
unless the PLL is using external feedback mode. In order to lock in  
external feedback mode, the external output must drive the board trace  
back to the FBINpin.  
Figure 4–56. extclkena Signals  
COUNTER  
OUTPUT  
CLKENA  
CLKOUT  
Fast PLLs  
Stratix GX devices contain up to four fast PLLs with high-speed serial  
interfacing ability, along with general-purpose features. Figure 4–57  
shows a diagram of the fast PLL.  
Altera Corporation  
February 2005  
4–93  
Stratix GX Device Handbook, Volume 1  
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