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EP1SGX40GF1020I6 参数 Datasheet PDF下载

EP1SGX40GF1020I6图片预览
型号: EP1SGX40GF1020I6
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 4697 CLBs, 41250-Cell, CMOS, PBGA1020, 33 X 33 MM, 1 MM PITCH, FBGA-1020]
分类和应用: 可编程逻辑
文件页数/大小: 272 页 / 1348 K
品牌: ALTERA [ ALTERA CORPORATION ]
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2. Stratix GX Transceivers
SGX51002-1.1
Transceiver
Blocks
Stratix
®
GX devices incorporate dedicated embedded circuitry on the
right side of the device, which contains up to 20 high-speed 3.1875-Gbps
serial transceiver channels. Each Stratix GX transceiver block contains
four full-duplex channels and supporting logic to transmit and receive
high-speed serial data streams. The transceiver block uses the channels to
deliver bidirectional point-to-point data transmissions with up to
3.1875 Gbps of data transition per channel.
There are up to 20 transceiver channels available on a single Stratix GX
device.
shows the number of transceiver channels available on
each Stratix GX device.
Table 2–1. Stratix GX Transceiver Channels
Device
EP1SGX10C
EP1SGX10D
EP1SGX25C
EP1SGX25D
EP1SGX25F
EP1SGX40D
EP1SGX40G
Number of Transceiver Channels
4
8
4
8
16
8
20
shows the elements of the transceiver block, including the four
channels, supporting logic, and I/O buffers. Each transceiver channel
consists of a receiver and transmitter. The supporting logic contains a
transmitter PLL to generate a high-speed clock used by the four
transmitters. The receiver PLL within each transceiver channel generates
the receiver reference clocks. The supporting logic also contains state
machines to manage rate matching for XAUI and GIGE applications, in
addition to channel bonding for XAUI applications.
Altera Corporation
June 2006
2–1