DC & Switching Characteristics
Table 4–49. M4K Block Internal Timing Microparameters
-5 -6
-7
-8
Symbol
Unit
Min
Max
3,807
2,556
Min
Max
4,320
2,840
Min
Max
4,967
3,265
Min
Max
5,844
3,842
tM4KRC
tM4KWC
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
tM4KWERESU
tM4KWEREH
tM4KCLKENSU
tM4KCLKENH
tM4KBESU
131
34
149
38
171
43
202
51
193
–63
131
34
215
–70
149
38
247
–81
171
43
290
–95
202
51
tM4KBEH
tM4KDATAASU
tM4KDATAAH
tM4KADDRASU
tM4KADDRAH
tM4KDATABSU
tM4KDATABH
tM4KADDRBSU
tM4KADDRBH
tM4KDATACO1
tM4KDATACO2
tM4KCLKHL
131
34
149
38
171
43
202
51
131
34
149
38
171
43
202
51
131
34
149
38
171
43
202
51
131
34
149
38
171
43
202
51
571
635
729
858
3,984
4,507
5,182
6,097
1,000
170
1,111
189
1,190
217
1,400
255
tM4KCLR
Table 4–50. M-RAM Block Internal Timing Microparameters (Part 1 of 2)
-5 -6 -7
-8
Symbol
Unit
Min
Max
4,364
3,654
Min
Max
4,838
4,127
Min
Max
5,562
4,746
Min
Max
6,544
5,583
tMRAMRC
ps
ps
ps
ps
ps
ps
tMRAMWC
tMRAMWERESU
tMRAMWEREH
tMRAMCLKENSU
tMRAMCLKENH
25
18
25
20
28
23
33
27
99
111
–53
127
–61
150
–72
–48
Altera Corporation
July 2005
4–31
Stratix Device Handbook, Volume 1